CISC and RISC

If RISC is faster, why was CISC predominant in the past? Back then, computer had very little storage. An instruction that could roll up several steps of complex operation, such as a do-loop, into a single instruction was an advantage, because memory was precious. In addition, instruction fetch was piecemail and sequential. Reducing the number of instruction saved time.

As it turned out, assembly langauage progreammers used the complicated machine instructions but compilers generally did not. It was difficult enough for compiler to recognize when a complicated instruction could be used, but the real problem was code optimizations. Verbatim translation of source constructs isn't very efficient. An optimizing compiler works by simplifying and eliminating redundant computations, After optimization, opportunities to use the complicated instructions tended to disappear.

On the other hand, there were several pushes for the development of RISC.
(1) The number of transistors that could fit on a single chip was increasing.
(2) Techiques like pipelining was difficult to be implemented for variable length instruction common in CISC design.
(3) As compilers improved, the resulting code generated for RISC out-performed equivalent complicated multi-cycle instructions in CISC.