Segment Table Origin Tegister

Control register 1 is the STOR which contains the segment table of the.currently running address space.  CR1 contains only 18 bits.  To find the segment tab;e, DAT appends 6 bits of 0s to form the real address for the segment table.

Page Table Entry

Page in virtual memory is allocated when it is GETMAINed.  The first page or a segment requested will be allocated a page table. Each PTE is either allocated or not allocated. The invalid bit indicated if the page is allocated.  The GETMAIN G-bit indicated donated if the page is in real memory or in external page store. The corresponding XPTE table store the cylinder track and tecord address of the page. 

Mainframe Storage Evolution

Primary Control Program (PCP) had no virtual storage. It manages real storage. Program loaded in the storage and uses overlay technique if the storage is not sufficient to host the entire program. One program is loaded and run at a time. 

The next step is MFT which divide the real storage into partitions predefined with fixed size. Program are fixed to particular partition based on their size. Use of storage is not optimal as small program wasted storage in the partition. Program loaded will have its base address be relocated by the loader to the partition real address for run. 

MVT is similar to MFT but the partition size is set    dynamically to reduce storage wastage for small program.  The downside is the possibility of memory fragmentation. If the freed up memory (when a program ends) is not large enough for the next program to run, the new program will have to wait. 

PCP, MFT and MVT addressed real memory directly. Program is compiled with origin 0. Loader will load the starting real memory address in the base register. This is called static relocation. 

MVT supports roll out and roll in operation to dynamically swap the whole program out the external store during run. Roll in will load the program in its original address before rollout so it is not very effective memory management. 

The next step is to develop virtual memory. Firstly, a program address space is divided into segments of block. Secondly, the address for each block is translate during run time which means the block load address can change while it runs. 

OS/VS1 and OS/VS2 release 1 (SVS) implemented virtual memory. However, there is only 1 virtual address space in the whole system. So they are corresponding to PCP and MVT using a larger virtual memory instead of real memory. 

MVS gave each user its own virtual memory space. 

Domain Linkage

 Calling into a domain gate is via a macro for the desired gate. The macro set R1 to point to the TPL, set R0 to contain the row and column numbers of the gate in the Domain Gate Table and then call to the module DFHKEDCL to link to the gate. The RPL contains a fixed length header and a variable length parameter list. 

CICS use standard register convention when entering gate. R1 points to the parm list. R4 points to the stack storage of current user (similar to stack frame pointer which point to the base of the current frame). R13 points to top of stack of the current frame. R14 is the return address and R15 is the go to addresss. 

CICS Task and Transaction

 A task is a how represented by DTA (Dispatcher Task Area) control block in the Dispatcher Domain.  A task is created via the ATTACH call to the dispatcher and is registered with the Kernel domain such that an KE task is assigned with associated KSS storage. 

A transaction refers to a how originated from AP domain with an associated TCA and EIS control block there. A TQE (task year element) in AP which map to DTA in DS which in turn maps to KE. 

System task only have DTA but no TCA  

Kernel Anchor Block

 KCB contains some fields previously found in CSA. It contains the address of the KE-Task table which map work unit to TCB (QR, CO, RO resource owning etc). It also co gain pointers to the KSS (kernel stack segments) which is 2 stacks (24 and 31 bits) used for save area for each KE task when module calling. KSS is in MVS storage separate form application for better protection. 

Domain Gate Table

 This table reside in the kernel domain and contains pointer to the domain anchor block and the entry points of the specific and generic domain gates for each domain. The index to the table form the domain token.