Color Depth

 To represent a colour on computer, each base color (RGB) is represented by a number of bit. The number of bit represent the intensity of the color emitted by variying the voltage to each colour pixel in the screen. The group of bits for a colour is called a color channel. The number of bit per colour represent the colour depth. Green colour may have more bits than red and blue in some representation because human eyes are more sensitive to green. 

Color model

Subtractive colour applies to light reflect off a surface such as paper. A colour painted on paper work by filtering out (subtract) certain frequent from white light hitting the surface. For example red color on paper is when light hit the color layer and certain frequency is removed, the remaining light hit the surface, reflected off and goes through the paint layer again. The result is the remains frequency shown as red.  The base color is not red blue and yellow, but cyan, magenta and yellow (CYM)  mixing all 3 colours result in a dark color not reallly black. The colour model is represented as CYMK and K stand for black  

Additive colour on the other hand is used when light is emitted from source.and directly observed.  This is the light sent out from monitor. The base color is red, blue and green (RBG). Mixing all 3 base colour result in white. 

SVC Type 2/3/4 processing by FLIH

 FLIH will obtain storage to build SVRB because the type 3 and 4 module will s separate from the nucleus. As interior is still disabled, FLIH cannot issue GETNAIN SVC. It uses GETCELL macro to get storage. 

FLIh then moves the registers saved in LCCA to SVRB. IO and external interrupt is re-enabled. Get the locks specified in the SVC table entry. Set up R14 with the address of EXIT PROLOG which is entered when the handle ends to clean up such as SVRB. Beach to the interrupt handler. 

SVC Type 1 processing by FLIH

 FLIH copies the registers in LCCA (saved by the interrupt) to TCB register save area. It then try to acquire a local lock (to the address space it runs in) conditionally. If the lock is granted, it set a flag to indicate it got the local lock, enable interrupt for io and external. It then obtains the other lock required based on the SVC table entry and call the handler. 

If the local lock cannot be granted, FLIh decrement the PSW instruction address by 2. PSW is saved in RB. So PSE is now pointing to the SVC instruction. FLIH then calls dispatcher to dispatch the next highest task in system. When the TCB becomes the highest task again, it becomes a resistance and retry the SVC call. 

SVC FLIH

Upon an interrupt, the system will automatically save the PSW in PSA and invoke the SVC FLIH (first level interrupt handler). 

FLIH firstly save the state including registers into LCCA. FLIH is executed with interrupt disable so that the registers will not be change before the save is completed. Next FLIH checks various pre-requisites for SVC call before it invoke the actual SVC module to process the request. This include:

- is the SVC called from another SVC? If yes, SVC violation and abend 

- is is called from SRB mode? It f yes, abend

- test the issuer holding any locks  if yes, abend

- check SVC old PSW if it is in disabled state. If yes, abend

When the tests are passed, FLIH get the TCB added from PSATOLD. Get the RB adddress from TcB. Save the states (PSE, ILC, interrupt code) into RB. 

Finally FLIH looks up the SVC handler address from the SVC table and perform one more check - to check if the SVC needs AFP authorised and that the caller indeed satisfy this crirteria. Depending on the SVC type, FLIH will perform some more processing before calling the SBC handler 

As FLIH is executed disabled, it cannot call ABEND SVC.  To abend the caller when above check fails, it uses CALLRTM macro which will resolved into a branch instruction to RTM1 which in turn jump to RTM2 abend processing. 

COBOL BL

 DMAP compiler option create the data division map in the compile listing. BL, base locator is just the base address for a 4K block of virtual memory. BL is an index (start from 1) to a table of base address kept in TGT (target global table). The value is to be loaded into a GPR as base register. A field in data division can be access with a displacement. The compile listing will show the BL and DISP clay for each field in the program. 

BLL (base link locater) is similar to BL but for field defined in the linkage section of the program. BLL actual storage valus are also kept in TGT

Address space TCB

 When an address space is created, the first tcb is handcrafted into the address space to kick start the processing required later. The first tcb is RCT (region control task) which initialixe the address space and prepare the address space for swap out and swap in. It will attached the dump task used to dump the address space. It will then start the STC (started task control) task which analyze the command used to start this address space (START, MOUNT, LOGIN) and start the next task accordingly. 

In case of START INIT command (batch), STC will start the initiator task which will start the job step task. 

LOGIN will start the TMP (terminal monitor program) and MOUNT will start the mount processor instead.