Sunday, October 30, 2011

x86 Segment Registers

8080 is a 8-bit CPU with 16-bit address lines. 16 bits define an address space of 64K. At that time, the prevalent OS is CP/M-80. CP/M loads itself to the top of the installed memory. (This allows CP/M to reside in ROM.) More importantly, it allows the transient (user) program to start at a fixed location in low memory, at address 0100h (256 bytes from the start of memory).

The first 256 bytes are called PSP (program segment prefix) which contains various odd bit of information and buffer for disk I/O. Program will be loaded at 0100h, follow by a section of unused memory. At the end is CP/M. Above that are addresses that are not supported by any installed RAM.

8086 has 20 address lines which gave an address space of 1MB (16x64K). To allow programs written for CP/M to run in (or port to) 8086, segment register was used to point to the starting address for a 64K memory area within the 1M address space. While the CPU can see the full 1MB of memory, the segment register restrict the access to 64K at a time. CP/M program runs in the 64K segment similar to 8080.


Segmenation model was a big plus in allowing more memory to be addressed than a linear model in a 16-bit architecture of 8080.  But when the CPU architecture moved on to 32-bit and 64-bit, the segmentation model is no longer required.

A segment starts on paragraph boundary (16-bytes). To form a 20-bit address, 2 registers are used. One of them is segment register which form the "base". There are 6 segment registers:

CS - code segment
DS - data segment
SS - stack segment
ES - extra segment (a spare segement)
FS and GS are clones for ES

While the segmentation scheme makes porting of CP/M program easy, this has severely complicated the programming model beyond CP/M.

Friday, October 21, 2011

CPU Architecture

Architecture is "what the CPU does". It comprises like instruction set and registers. x86 CPU archtiecture evolves but attained high degree of backward compatibility. New instructions were added and width of the CPU expanded from 8 to 16 to 32 to 64 bits. Intel's 32-bits architecture is called IA-32. The new 64-bit architecture is called x86-64 which was invented by AMD. Inte;'s 64-bit architecture is called IA-64 Itanium which was not backward compatible to IA-32.

A CPU's microarchitecture is an implementation of an architecture. Different techniques are used to improve the throughput and speed of the execution (E.g. prefetch, cache, micro-op fusion etc.).