Wednesday, December 31, 2008

Single Instruction Multiple Data SIMD

The first SIMD in Intel CPU appeared as MMX (Multimedia Extension). MMX works on 64-bit register. The 64-bits are recognized as 2 32-bit values. Instead of creating new SIMD registers, Intel has decided to use the floating point registers for MMX calculation. The floating point registers R0 to R7 are renamed to MMX0 to MMX7 for SIMD. The new data type created for MMX are all integer-based.

AMD follow with 3DNow! technology which used the floating point registers for SIMD calculation as Intel's MMX. The difference is that AMD recognized the data packed in the MM0 to MM7 register as floats. It was followed by Enhanced 3DNow! in Athlon CPU in which both Integer and Floating Point data types are supported.

In its, Pentium III CPU, Intel provided a set of 8 new registers of 128-bits size. This is enough to store 4x32-bit floating point values and this is useful in 3D calculation which deal frequently with 4x4 matrices. These new registers are called XMM0 to XMM7. Intel called the technology as Streaming SIMD Extension (SSE). Intel upgrade to SSE2 when introducing Pentium IV. With SSE2, integer values are supported as well. AMD followed suit with 3DNow! Professional, which is fully compatible to SSE2.

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