Power saving states

C state refers to core state which power to the core parts are turned off to save power. There are different C state level with progressive longer exit latency. 

Package C state applies the techniques beyond the core to other components in the package like cache, integrate PCIe controller etc

P state refers to power state which frequency and voltage scaling is used to save power on the core or package level 

T state is to duty recycle core (shutdown the core). This is not so much to save power but to throttle to reduce thermal and power issues. 

S state refer to sleep state which drive the poster to near zero. This is usually employed in workstation but can also used for server. 

G state refers to global state which is similar to S state but apply to the whole platform. 

D state refers to device state which component like PCI card or drive is powered down to save power. 

Power saving strategies

 Power saving strategies may or may not save power if its usage is not engineered. Turning off a circuit trade off performance vs power consumption. However, other circuit waiting for the resumption of the part may wasted power during the waking up and overall power consumption reduction may be voided or even negated in some circumstances. 

Race to idle strategy is to operate the server at its peak performance at all time and jump into power saving mode when the work is cleared. This strategy usually not taken because of its impact to performance to long start up time from a deep state and also the power costumed in idle state to make it effective.   

Slow and steady strategy operate the server at level to process work continuously hourly without enter into power saving state. This is the most common strategy for server. 

Jog to idle strategy processes work at an optimal frequency and hip into power saving mode during work gap. The issue associate with this strategy is that the gap could be difficult to come by and few depending on the workload. 

Not off but reduce power

 Power consumption is proportional to frequency applied to a circuit part. If the work does not requires too performance, the frequency could be reduce to lower the power voltage consumed.  If the part is not needed for some time, just maintain the retention voltage level to that part to minimise power. 

Clock gating and power gating

Synchronous logic required clock signal to operate. Stopping clock signal to a part will reduce the active  power usage by that part. 

Power dating stop the power completely to a part. It saved both active power and stopped leakage too. 

To resume the operation for that part, clock gating takes less time then power gating (u sec vs n sec) because the latter need more time to restore its state in the circuit. 

Active power

 CPU power consists of logic power and io power. Logic power consists of dynamic power and leakage power. Dynamic power included the power used by the clocks and the power used for computation.  Dynamic power varies according to the workload. For example a simple application not using floating point calculation will consume less power as the floating point unit is unused. Leakage of power exists when  transistor are charged and discharged  

Io power is used to drive the connections from the CPU to the peripheral. Some io connection uses power proportional to the bandwidth (eg ram). Some io uses constant power all the time eg PCI. 

The third type of power is called platform power which is the power used by ram, disk, network card etc. 

IO signalling

 Single-ended signalling use a reference line transmitting the base voltage. To transmit n bits, it uses n+1 signal paths. The data path voltage relative to the reference line determine the value of the bit. 

Differential signalling uses 2 lines and their relative voltage different determine the bit transmitted. Differential signalling has higher interference resistant but uses more power even when there is no transmission is needed. 

Thermal Design Point

 TDP indicate the heat generated by a CPU running with a worst case SSE commercial application for a period of time. CPU is designed for a specific TDP to ensure heat generated are dissipated. CPU would throttle or shutdown if it operate above TDP.  TDP is defined with a base frequency (p1 frequency)  

Actual workload having different profile may operate the CPU below TDP. This gives room for increasing the base frequency when this workload runs and this is the basis for turbo.