APPLE II BASIC

 The BASIC ROM contains the BASIC interpreter. User enter the program line by line and it was parsed and stored as linked list in memory. The line number specified for each statement is needed for the parser to know where to insert the parsed structure in the linked list. The parsed statements are then interpreted to run the program. 

CICS PCP

Program Control Program (PCP) is used support program call function in CICS.  CICS supports LINK API which allow one program to call another program.  The callee returns to the caller when finished.  XCTL pass control to another program of the same level and there is not return from the callee.  LOAD allows a program to load another load module (table, map etc) into memory.  PCP also support abend handler (HANDLE ABEND) which percolate control up program levels when a program encountered an abend.

CICS PCP functions allow related program to call each other dynamically.  Related programs does not need to be linked into a big module.  PCP also allocate separate working storage for each transaction which share the same program.  PCP also saves and restores program related fields in TCA.

CICS Table Management

Table management module was introduced to supported RDO on CICS.  As RDO is dynamic in nature, TMP uses a chained table entries in a list so that the size can changed without restarting CICS. Each control table chain in CICS started from  a scatter table which contain a hash table of pointers. Table entries are hashed for fast search starting from the pointer in corresponding table entries. Entries hashed to the same value will be chained off. The scatter table also contains a pointer that chain all entries for sequential scan through the whole table.  Program like CEMT can access tables via a call to TMP.

TCA LIFO

The LIFO area is a stack area used by CICS modules to save registers. Additional LIFO storage can be allocated in DSA. 

Transaction Work Area

 TWA can be requested via PCT. TWA is mainly used by macro level program became the working storage is not duplicated for each task using the same macro level program.  In marco level program, the working storage is assumed to be read only.  

(his is different from command line program which using EIP and the working storage is automated allocated separately for each transaction using the same program.  Therefore, command level program seldom uses TWA. 

TWA is deleted when the transaction ends. The issue for using TWA is that it is allocated behind UTCA in control block area. Storage violation would likely affects CICS availability. 

CICS Dispatcher list

The suspend list contains tasks that waiting for long wait. I/O wait is not considered to be long and thus task waiting for I/O is queued in the active list instead. Long wait are those that may not have a target deadline like terminal I/O or interval control wait etc. 

Tasks in active list are ordered by priority which is calculated as the sum of transaction, terminal and user priority capped to 255 (stored in a byte). 

TCP (Terminal Control) task which is used to attach new task have priority of 255 and is placed on top of the list. Tasks are queued in the active chain in priority order.  New task are placed behind tasks with same priority (FIFO).

X86 floating point

80287 was the first floating point co-processor for x86. The floating point registers were organized in a stack architecture. Floating point instructions was handled by ESC opcode prefix. The performance has been lagging comparing to other CPU. Intel subsequently introduced SSE implemented with a traditional floating point architecture. SSE also allow loading of 4 single precision floating point data into its register and gave further speed up.

Floating point Arithmatics

As there is infinite number of values between 0 and 1, storing floating point in a bit string with fixed length (like 32 bit register) is a an approximation of the actual real number. Therefore, floating point arithmetic may not be precise. Floating point instruction provide multiple option for programmer to treat the computed result - rounds up, rounds down etc. 

Floating point bias

To facilitate comparison, floating point store the sign in fist speed follow by exponent bits. The exponent is stored as two’s compliment number. 

An unsigned integer of 8 bits cover the value of 0 to 255. Two’s compliment encoding divide the 256 values into (almost) half for positive and half for negative. The advantage of two’s compliment number is that we can just add positive and negative number without heeding the sign and still generate the correct result. 

As exponent is stored as two’s compliment, the value of negative is higher ( in binary format) than positive exponent. To allow correct comparison, ieee754 uses a bias of 127. The bias was added to the exponent before it is stored. So the comparison would be performed naturally. 

When the floating point is used for computation, the bias is subtracted from the exponent before use 

Floating point

Scientific notation refers to a number with a single digit to the left of the decimal point and an exponential figure to the right. For example 1.23x10^2 is the scientific notation for 123. 

Normalised number refer to a scientific notation without leading zero. For example, 0.123x10^4 a s not a normalised scientific notation.  

Floating point is an encoding of the normalised scientific notation in binary in a word. The fraction part represents the precision and the exponent part represents range. The fraction is assumed to have a leading one which is not included in the encoding. 

The first bit is a sign bit followed by 8 bits for exponent and 23 bits for fraction. So the precision is 24 bits with the implicit leading 1. For double, the fraction is 52 (+1) bits long. The exponent is 11 bits long. 

The decimal value represented is equal to (-1)^sign x fraction ^ exponent

Multiplication and division logic

Multiplication is implemented in hardware as a series of shift and add operation. The implementation can be accelerated using multiple adder hardware to perform the operation concurrently. 

Division algorithm is serial in nature. Each step depends on the result of the previous step in the algorithm. Therefore, it cannot be enhanced easily like multiplication    In other words, the performance of division will be lower than multiplication. 

X86 Instruction Prefix

 X86 instructions support data size of 8, 16, 32 and 64 bits.  The default size (either 16 or 32 which is considered more commonly used) is set in bit in code segment register. To override the default, we be can use an instruction prefix. 

There are 3 other prefix originated from the 8086 that modify the behaviour of instructions. They are used see to

1. Overdue the default segment register

2. Lock the bus to support synchronzation

3. Repay the instruction until ECR counts for ti 0.  This prefix is commonly used to move a number of bytes  ironically, this method is slower comparing to software routine using load (to register) and store (to memory). If we use floating point register, the performance is even higher in this way. 

X86 register

X86 has 8 GPR which is much less comparing to RISC CPU.  The low number of GPR also influenced the instruction set format. One of the register will be both source and destination of the instruction.