Clock gating and power gating

Synchronous logic required clock signal to operate. Stopping clock signal to a part will reduce the active  power usage by that part. 

Power dating stop the power completely to a part. It saved both active power and stopped leakage too. 

To resume the operation for that part, clock gating takes less time then power gating (u sec vs n sec) because the latter need more time to restore its state in the circuit.